Here’s a short video showing how you can use airhdl to quickly create an AXI4-Lite register file, and integrate the generated component into an existing Xilinx ZYNQ System using the Vivado block diagram editor.
Here’s a short video showing how you can use airhdl to quickly create an AXI4-Lite register file, and integrate the generated component into an existing Xilinx ZYNQ System using the Vivado block diagram editor.